Automated schematic checker for Altium Designer. Export your netlist, validate against datasheets, and catch design mistakes before sending to fabrication.
Benefits
Altium Designer has powerful built-in checks, but can't validate against datasheets. Traceformer fills the gap—catching design errors that only appear in documentation.

Validates your Altium schematic against component datasheets. Verifies pin functions, voltage levels, and IC configurations that ERC can't check.
Every finding cites specific datasheet pages so you can verify the reasoning yourself. No guessing—if there's no documentation to support an issue, it goes to "Missing Info" for manual review.
Validates IC boot modes, configuration pins, external component requirements, and interface settings. Catches the subtle mistakes that prevent boards from powering on.
How it Works
From Altium Designer to validated schematic
From Altium Designer, go to File → Export → Netlist Schematic. Choose EDIF format and save as .net file. Works with both project-wide and single-sheet exports.
Detailed export guide →Drop your Altium .net file into Traceformer. Add datasheets for your components—we'll auto-fetch common parts or you can upload custom PDFs.
Get comprehensive review in minutes. Results show errors, warnings, verified items, and checks needing manual review—all backed by datasheet citations.
Features

Customize review parameters, token limits, and design rules to match your Altium design. Choose between OpenAI or Anthropic models.

Choose from OpenAI or Anthropic models for your Altium schematic reviews. Each optimized for different use cases.

Datasheets for common components are fetched automatically from trusted sources like Digi-Key and Mouser.
Issue Detection
Great at catching common mistakes
SDA/SCL lines missing pull-ups, wrong pull-up voltage rail, or parallel pull-ups creating too-strong drive strength
TX connected to TX instead of RX, or RX connected to RX—one of the most common debugging headaches caught before board spin
5V output driving 3.3V input without level shifting—damages ICs or causes unpredictable behavior
EN/SHDN pins not driven or pulled to defined level, boot strap pins left floating, or GPIO0 missing pull resistor for programming mode
Format Support
Primary support for EDIF format, with other formats in beta
Recommended. Full support for EDIF netlist exports. This is the standard format we test against and recommend for best results.
OrCad/PCB2, PADS, and PCAD formats may work but are not officially supported. Contact us if you need a specific format.
FAQ
Free tier includes 1 review per month. No credit card required.